Memory-Integrated Network-Interface Processor
Why should we care about access to the network interface card (NIC)?
For the same reasons we care about OS-bypass protocols like
ST, FM, PM, and VIA - to
alleviate the networking bottlenecks at the networking endpoints in
order to provide lower latency and higher bandwidth to the end-user
application. With the ever-increasing speeds of network links, e.g.,
HiPPI-6400 at 6.4
Gb/s and DWDM at O(Tb/s), and with processor speeds doubling every
18 months, the networking endpoints, i.e., the path between the
network and the processor, will continue to be a bottleneck in the
years to come. Thus, a faster path to the network is absolutely
essential.
Rather than treat a network interface card (NIC) as a second-class
citizen by attaching it onto the peripheral I/O bus, a NIC should be
treated as a first-class citizen by attaching it onto the system
bus, integrating it into the memory system, and treating it as a
network processor (as a peer to a general-purpose processor) in
order to further enhance overall system performance. The MINI Processor
project gets its name these defining attributes, i.e., a
memory-integrated, network-interface processor.
Designing a NIC to be accessed like memory rather than as a
peripheral device allows application programmers to focus on
parallelizing programs (by hiding the details of managing
parallelism and data locality from the programmer) rather than
burdening them with managing explicit data movement into and out of
a computing node.
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Wu, do we want to say it this way? This seems to imply we are
working on yet another shared memory implementation when in reality
we are approaching the idea of shared memory from a different angle.
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