Salishan 2008

Theme: HPC in the Era of Ubiquitous Parallelism: Multicore and Hybrid Architectures

Keynote Address: Multicore Meets Exascale: The Catalyst for a Software Revolution, Kathy Yelick, Lawrence Berkeley National Laboratory

Session 1: Processor Architecture Roadmap

• Exascale-the Next Great Challenge, Peter Kogge, University of Notre Dame, and William Harrod, DARPA
• Exascale Ambitions What, me worry? : ΔS > kB ln2, William J. Camp, Intel Corporation
• The Role of Accelerated Computing in the Multi-core Era, Charles Moore, AMD*
• Why CPU's Have to Evolve: From Homogeneous to Heterogeneous Chips, a Brief Overview, Michael Paolini, IBM Corporation

Session 2: System Software

• Systems Software Challenges and Strategies for the Petascale/Exascale Era, Fred Johnson, DOE Office of Advanced Scientific Computing Research
• The Role of Compilers and Programming Languages for Client-Side Multicore Systems, Vikram Adve, University of Illinois, Urbana-Champaign
• Quad-core Catamount and R&D in Multi-core Lightweight Kernels, Kevin Pedretti, Sandia National Laboratories, SAND number 2008-1725A
• Petascale Communication is not Business as Usual, Al Geist, Oak Ridge National Laboratory

Working Dinner/Speaker

• Multicore: Hey, Wait a Minute?, Dan Reed, Microsoft

Session 3: Applications

• SciDAC and the Path Toward Exascale, Walter Polansky, Office of Advanced Scientific Computing Research, Office of Science
• Kinetic Plasma Modeling with VPIC: Status and Future Plans on Hybrid Architectures, Brian Albright, Los Alamos National Laboratory, LA-UR-08-2557
• Coping with Petascale Architectures, Bronis R. de Supinski, Lawrence Livermore National Laboratory, LLNL-PRES-403033
• Auto-tuned Optimization of Scientific Kernels on Leading Multicore Systems, Leonid Oliker, Lawrence Berkeley National Laboratory

Session 4: Programming Models/Environment

• Programming Models and Languages for High Performance Computing, Marc Snir, University of Illinois, Urbana-Champaign
• Toward an Open and Unified Model for Heterogeneous and Accelerated Multicore Computing, Catherine Crawford, IBM Corporation, LA-UR-08-3500
• Transactional Memory for a Modern Microprocessor, Marc Tremblay, Sun Microsystems, Inc.

Session 5: System Architectures

• The Institute for Advanced Architectures and Algorithms, Sudip Dosanjh, Sandia National Laboratories, and Jeff Nichols, Oak Ridge National Laboratory, SAND 2008-2204P
• Sequoia Architectural Requirements, Matt Leininger, Lawrence Livermore National Laboratory, LLNL-PRES-403472
• The Cray Roadmap to Cascade, John Levesque, Cray, Inc.
• Moore, More Cores, and More Application Performance, Darren Kerbyson, Los Alamos National Laboratory, LA-UR-08-2847

Random Access

• Hybrid MPI + OpenMP Issues, Rolf Rabenseifner, University of Stuttgart
• Is Dynamic Memory Management Dynamic Enough? Jeff Keasler, Lawrence Livermore National Laboratory, LLNL-PRES-403029
• A 192K Process BG/L Simulation of Laser-plasma Interactions, Steve Langer, Bert Still, Denise Hinkel, Bruce Langdon, and Ed Williams, Larwrence Livermore National Laboratory, LLNL-PRES-403016.
  
• Redesigning Dense Linear Algebra Software for ManyCore and Beyond, Jack Dongarra, University of Tennessee and Oak Ridge Natinal Laboratory
• Asian HPC Update (Japan, China, India), David Kahaner, Asian Technology Information Program (ATIP)
• Nuclear Energy Advanced Modeling and Simulation (NEAMS), Alex Larzelere, Advanced Simulation and Modeling Office of Nuclear Energy, Fuel Cycle Management (NE-5)
• Whole System Performance Instrumentation, Patrick Worley, Oak Ridge National Laboratory
  
  
  

*will not be posted