The Valid_State_Assembled_Vector procedure returns true iff the Assembled_Vector is in a valid state - that is, iff the Assembled_Vector passes all of the valid state tests.
Calling syntax:
| Logical = Valid_State(AV) |
Input variables:
| AV | The Assembled_Vector to be checked. |
Output variable:
| Valid_State | True iff the Assembled_Vector is in a valid state. |
The Valid_State_Assembled_Vector code listing contains additional documentation.